Speaker
Description
Accelerating RF field controls for Free-Electron Lasers FLASH and EuXFEL are based on driving multiple superconducting cavities with a single klystron. The realization of the control loop is distributed into several FPGAs. Open loop verification of each subsystem is straightforward but closed loop performance analysis is challenging. Detailed performance evaluation and regression testing are crucial for a sustainable Continuous Integration (CI) environment. Hardware Description Language (HDL) simulators are the core tools for digital design verification; and especially with the use of mainstream methodologies, functional coverage can be achieved efficiently. Nevertheless, the numerical analysis capabilities are limited in HDL with respect to high-level programming languages. This fact highlights the fundamental necessity of co-simulation which also enables software integration inherently. An ongoing effort for Model in the Loop (MIL) verification for the LLRF control systems of FLASH and EuXFEL, aims to evaluate the algorithm performance on CI of firmware and software, in conjunction with the models of hardware components and the superconducting RF accelerator structures.
| Keyword | MIL, simulation, FPGA, verification, CI, LLRF, multi-cavity |
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