Description
A prototype beam pattern generator for the PIP-II Linac was tested with beam during the PIP2-IT testing a couple of years ago. This system used Labview as a user interface and for some of the digital signal processing along with the pattern generation performed on an external server. A new design using a COTS sourced SOCFPGA and a DAC board offers the advantages of low hardware and development cost. The pattern generation, digital signal processing and the interface to an external EPICS server are integrated onto the ARM processor of the FPGA. The system design is described and the test results are presented.
Primary author
Hitesh Shukla
(Fermilab)
Co-authors
Dr
Philip Varghese
(Fermilab)
Shrividhyaa Sankar Raman
(Fermi National Accelerator Laboratory)
